1. Field of the Invention
This invention relates generally to testing the electrical integrity of semiconductor devices, and more particularly to apparatus for and methods of for testing high density semiconductor devices by the fixed point probe method.
2. Description of the Prior Art
A number of fixed point probe devices have previously been disclosed. Chayka, et al, U.S. Pat. No. 3,810,016, discloses a microprobe for testing beam-lead semiconductor devices. The contact elements are photoetched from a blank and embedded into a plastic insulator. Chayka, et al recognized the need for providing mechanical fabrication and assembly techniques for fixed point probes. However, the contact element of Chayka, et al is assembled separately from the ring binder adding costs and expense.
Kattner, et al, U.S. Pat. No. 4,065,717, discloses a probe assembly which includes a mounting plate having a port portion with an opening, a transparent disk designed to fit within the opening and a backing card sized and shaped to fit compatibly with the mounting plate. The backing card is flexible and sheet-like having electronic circuitry connected to an appropriate readout. The transparent disk includes a plurality of probes for electrically connecting a semiconductor device with the backing card. The probes, as illustrated in FIG. 8 of Kattner, are wire-like.
Luthi et al, U.S. Pat. No. 4,329,642 discloses a carrier and test socket for a leadless integrated circuit package discloses a carrier having a plurality of leads the carrier having a central opening. The leads have a cantilevered end which extends over the cavity and which may be brought into electrical contact with the semiconductor device. One embodiment of the carrier includes a lead frame which is formed from a sheet of material such as copper by photoresist masking and chemically etching a plate to form the desired lead pattern. A chip is provided to maintain the semiconductor device in fixed position to the carrier during testing.
The common industrial practice, is to make probe cards from discrete components mounted on a board. For example, U.S. Pat. No. 4,382,228 issued to Evans discloses a fixed point probe anchored on a probe card. The probe is a rigid holder having a deflectable needle extending therefrom to engage a respective contact of a semiconductor device. There are a plurality of such needles which physically engage the contacts or pad areas of the semiconductor device. As will be appreciated, the pad areas of a typical semiconductor device, e.g. a wafer or chip, comprise a top layer of aluminum, a second layer of silica oxide (SiO.sub.2) and a bottom layer of silicone. In typical operation, the needles of the probe pierces the aluminum layer of each pad area. It is highly desirable not to do damage to the pad area so that the semiconductor device will function properly after testing. If uneven pressure is applied to the aluminum, snowplowing can result causing improper contact for the semiconductor device when in use. Additionally, it is typical to test the probe needle using a load resulting in 15,040 psi. Should there be uneven pressure, a load of greater than 18,000 psi could result. It will be appreciated that the glass layer has stress failure at greater than 18,000 psi. Thus, uneven pressure can cause the SiO.sub.2 layer to have micro cracks.
Additionally, in order for the needle to make electrical contact with the semiconductor device, the needle is ordinarily scrubbed, further causing snowplowing and uneven pressure. A more detailed explanation of the problems associated with probing a semiconductor device by probe needles is set forth in Probing Techniques: Evolution, Practice and Prediction, Frank Ardezzone (Probe-Rite 1973).
As will be appreciated from the foregoing, the plurality of needles must be almost exactly at the same height. The industry wide standard for height tolerance of the needles is 0.1 mil. The process for accomplishing this is known as planarization. In planarizing fixed probe needle type boards, manual sanding or filing are necessary to bring the needles within required tolerance range. Manual manipulation of this type can cause damage to the probe card as well as the probe needle itself. It will be appreciated that a large number of hours are required by a skilled operator to accomplish planarization. Even then, industry complaints have arisen because of damage to the semiconductor devices, needles and probes.
Another problem associated with prior art needle type probe boards, is that the probe needles take up a relatively large amount of space in connecting them to the probe card. In the case of high density semiconductor devices, two or more cards may be needed in order to conduct the test. Current commercially available test apparatus are not capable, in one step, of testing the number of contact points in current semiconductor devices. Further, design criteria of semiconductor devices are now being restricted by commercially available test equipment, particularly probes not having sufficient contact points and probes which too often damage semiconductor devices.
The attention directed at the testing of semiconductor devices is constantly increasing. It has become imperative that manufacturers of semiconductor devices be able to test their product quickly, efficiently and thoroughly.
Manual testing of a semiconductor device having several hundred (perhaps thousand) contacts, may be impossible as well as financially impractical. The need of the industry is for a probe apparatus which can be inexpensively made and which will free designers to create even more radical semiconductor devices. The probe apparatus must be capable of being used by unskilled operators while maintaining excellent standards for reliability.